Ontological Layer: High-Energy Switching

Power Devices

The Control of Massive Electrical Force

The Industrial Machine

Small-signal transistors manipulate information; power devices manipulate raw energy. When voltages reach kilovolts and currents reach hundreds of amperes, the physical structure of the semiconductor must change. This realm maps the heavy-duty thyristors, robust MOSFETs, and thermal constraints required to switch massive power without catastrophic failure.

POWER → SEMICONDUCTOR → GATE TRIGGER → CONDUCTION vs BLOCKING → HEAT LOSS → THERMAL MANAGEMENT → PROTECTION (SNUBBER) → CONVERTER SYSTEM

The 12 High-Energy Nodes

Ontological Mapping: Nodes 01 - 79

GROUP 01-08

Power Concept & Losses

03 Voltage Blocking Requirements
04 High Current Carrying Capacity
07 Conduction Power Loss
08 Switching Power Loss

GROUP 11-13

The Power Diode

11 P-I-N Physical Structure
High Reverse Breakdown Voltage
12 Fast-Recovery Characteristics
13 Schottky Power Diodes

GROUP 17-20

SCR & Thyristors

17 PNPN Four-Layer Structure
19 Gate Triggering Mechanisms
Latching & Holding Currents
20 Commutation (Turn-Off)

GROUP 21-22

DIAC & TRIAC

21 DIAC (Bidirectional Breakover)
22 TRIAC Bidirectional Conduction
AC Phase Control / Dimming
Four-Quadrant Gate Triggering

GROUP 23-24

UJT & PUT

23 Unijunction Transistor Construction
Intrinsic Standoff Ratio (η)
Negative Resistance Region
Thyristor Triggering Circuits

GROUP 14-16

Power Transistors

15 Vertical Power MOSFET Structure
On-State Resistance (RDS(on))
16 Insulated-Gate Bipolar Transistor
Voltage vs Current Control Trade-offs

GROUP 31-34

Switching Dynamics

31 Voltage & Current Overlap
Turn-On and Turn-Off Transients
32 High-Frequency Switching Loss
34 Total Power Dissipation Profile

GROUP 09, 35-39

Thermal Management

36 Maximum Junction Temperature
35 Thermal Resistance (θJC, θCA)
37 Heat Sink Design & Sizing
38 Preventing Thermal Runaway

GROUP 10, 40-46

Safe Operating Area

10 Forward-Bias SOA Boundary
44 Secondary (Thermal) Breakdown
45 Maximum dv/dt Constraints
46 Maximum di/dt Limits

GROUP 47-50

Device Protection

47 RC Snubber Circuits
Controlling Transient Voltage Spikes
49 Freewheeling Diodes
Surge & Overcurrent Protection

GROUP 68-74

Power Conversion Bridge

69 Controlled Rectification (AC→DC)
71 DC Chopping (DC→DC)
72 Inverters (DC→AC)
Bridge to Realm 18 (Power Supplies)

FINAL PROTOCOL

12 — Power Device Laboratory

[26] GATE DRIVE DESIGN [35] THERMAL CALCULATION [47] SNUBBER TUNING [59] DEVICE SELECTION [60] DATASHEET ANALYSIS

The ultimate engineering compromise between speed, conduction, and heat. Selecting the correct TO-220 or TO-247 package, calculating required heat sink surface area based on Rθ, designing isolated gate drivers, and verifying switching waveforms to prevent catastrophic failure.

SIMULATION RUNNING